The present invention generally relates to a diode, a method for fabricating the diode and a coplanar waveguide, and more particularly relates to a diode that should have an increased isolation.
A large-capacity, high-speed communications system, utilizing the millimeter-wave band (i.e., between 27 GHz and 32 GHz) as its frequency resource, is one of the potential next-generation communications systems. In the field of communications systems, an RF switch with high isolation, which is applicable to switching the modes of operation from transmission into reception, and vice versa, is in high demand. A PIN diode mainly composed of GaAs is one of the candidates for the RF switch. In the current state of the art, a PIN diode switch is normally implemented as a vertical PIN diode. However, a PIN diode switch is also implementable as a horizontal PIN diode. A horizontal PIN diode can be fabricated by an ion implantation process. Accordingly, compared to the vertical PIN diode, the production cost can be cut down by using the horizontal PIN diode and those horizontal PIN diodes can be integrated together much more easily.
FIG. 8 illustrates a cross-sectional structure of a known horizontal PIN diode. As shown in FIG. 8, the horizontal PIN diode includes n- and p-type semiconductor regions 102 and 103 that are defined in a semiconductor substrate 101 of GaAs. An n-side ohmic electrode 104 is formed on, and makes an ohmic contact with, the n-type semiconductor region 102, while a p-side ohmic electrode 105 is formed on, and makes an ohmic contact with, the p-type semiconductor region 103. The n- and p-type semiconductor regions 102 and 103 are horizontally spaced apart from each other by about 1 xcexcm. Specifically, the n-type semiconductor region 102 is formed by implanting Si ions as dopant ions into the GaAs substrate 101, while the p-type semiconductor region 103 is formed by implanting Zn ions as dopant ions into the GaAs substrate 101. The n-side ohmic electrode 104 is formed on the n-type semiconductor region 102 by evaporating and depositing AuGe, for example, thereon. On the other hand, the p-side ohmic electrode 105 is formed on the p-type semiconductor region 103 by evaporating and depositing a stack of Ti, Pt and Au, for example, thereon.
In the horizontal PIN diode shown in FIG. 8, the amount of current flowing rises steeply enough when the diode is turned ON. In addition, the diode has an extremely low resistance, thus attaining a very low loss. It is already known that particularly when the amount of current flowing is raised by increasing the width of the diode, the loss can be reduced considerably.
In the known horizontal PIN diode, however, the n- and p-side ohmic electrodes 104 and 105 face each other. Thus, an inter-electrode capacitance exists between the n- and p-side ohmic electrodes 104 and 105 to decrease the isolation. If the spacing between the n- and p-type semiconductor regions 102 and 103 is about 1 xcexcm, then the spacing between these ohmic electrodes 104 and 105 is usually as narrow as around 4 xcexcm due to various constraints involved with process conditions. Such a narrow gap is one of the main factors of the unwanted increase in capacitance. Moreover, as the diode is widened to increase the amount of current flowing and thereby minimize the loss, the inter-electrode capacitance increases correspondingly. Accordingly, under the current circumstances, it is difficult to cut down the loss drastically and increase the isolation sufficiently at a time.
It is therefore an object of the present invention to provide a diode with an increased isolation.
An inventive diode includes: a cathode electrode and an anode electrode that are disposed on a semiconductor substrate and are spaced apart from each other; and a shielding metal member placed between the cathode and anode electrodes.
In one embodiment of the present invention, the diode further includes n- and p-type semiconductor regions that are defined in the semiconductor substrate. The cathode electrode is an n-side ohmic electrode formed on the n-type semiconductor region, while the anode electrode is a p-side ohmic electrode formed on the p-type semiconductor region. And the shielding metal member is placed between the n- and p-side ohmic electrodes.
In another embodiment of the present invention, the diode further includes an n-type semiconductor region and an n-type heavily doped semiconductor region that are defined in the semiconductor substrate. The cathode electrode is a Schottky electrode formed on the n-type semiconductor region, while the anode electrode is an n-side ohmic electrode formed on the n-type heavily doped semiconductor region. And the shielding metal member is placed between the Schottky electrode and the n-side ohmic electrode.
In still another embodiment, the diode may further include an insulating film that is formed between the shielding metal member and the semiconductor substrate.
In yet another embodiment, the top of the shielding metal member is preferably higher than the tops of the cathode or anode electrode.
In yet another embodiment, the shielding metal member may be a metal wall with first and second sides, which face a side of the cathode electrode and a side of the anode electrode, respectively. The first side of the metal wall may be greater in area than the side of the cathode electrode.
In an alternative embodiment, the shielding metal member may also be a metal wall with first and second sides, which face a side of the cathode electrode and a side of the anode electrode, respectively. The second side of the metal wall may be greater in area than the side of the anode electrode.
An inventive method for fabricating a diode includes the steps of: a) defining p- and n-type semiconductor regions in a semiconductor substrate; b) forming a p-side ohmic electrode on the p-type semiconductor region; c) forming an n-side ohmic electrode on the n-type semiconductor region; d) forming an insulating film on a region of the semiconductor substrate, the region being located between the p- and n-type semiconductor regions; and e) forming a shielding metal member on the insulating film.
In one embodiment of the present invention, the step a) may include the sub-steps of: preparing a semiconductor substrate (e.g., semi-insulating semiconductor substrate) with a high resistivity; defining p- and n-type doped regions in the semiconductor substrate; and activating dopants in the p- and n-type doped regions.
In another embodiment of the present invention, the step b) or c) and the step e) may be performed at a time by using the same material for the p- or n-side ohmic electrode and the shielding metal member.
An inventive coplanar waveguide includes a diode including a cathode electrode, an anode electrode and a shielding metal member. The cathode and anode electrodes are disposed on a semiconductor substrate and spaced apart from each other. The shielding metal member is placed between the cathode and anode electrodes. The coplanar waveguide further includes: a first signal line connected to the cathode electrode of the diode; a second signal line connected to the anode electrode of the diode; and a grounded conductor placed in the vicinity of the first and second signal lines and connected to the shielding metal member.
In one embodiment of the present invention, the shielding metal member and the grounded conductor may be integrated together.